Part Number Hot Search : 
VRE101C E101M FAN8001 KD1124 BP32E3 A5800290 045CT LT1001CH
Product Description
Full Text Search
 

To Download BD9111NV-09 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  1/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. single-chip built-in fet type switching regulator series output 2a or more high efficiency step-down switching regulator with built-in power mosfet bd9111nv description rohm?s high efficiency step-down switching regulator bd9111nv is a power supply designed to produce a low voltage including 3.3 volts from 5 volts power supply line. offers high efficiency with our original pulse skip control technology and synchronous rectifier. employs a current mode control system to provide faster transient response to sudden change in load. features 1) offers fast transient response with current mode pwm control system. 2) offers highly efficiency for all load range with synchronous rectifier (nch/pch fet) and sllm tm (simple light load mode) 3) incorporates soft-start function. 4) incorporates thermal protection and ulvo functions. 5) incorporates short-current protec tion circuit with time delay function. 6) incorporates shutdown function 7) employs small surface mount package : son008v5060 use power supply for lsi including dsp, micro computer and asic absolute maximum ratings (ta=25 ) parameter symbol limits unit v cc voltage v cc -0.3 +7 *1 v pv cc voltage pv cc -0.3 +7 *1 v en voltage v en -0.3 +7 v sw,ith voltage v sw ,v ith -0.3 +7 v power dissipation 1 pd1 900 *2 mw power dissipation 2 pd2 3900 *3 mw operating temperature range topr -25 +105 storage temperature range tstg -55 +150 maximum junction temperature tjmax +150 *1 pd should not be exceeded. *2 derating in done 7.2mw/ for temperatures above ta=25 , mounted on 70mm70mm1.6mm glass epox y pcb (the density of copper:3%) *3 derating in done 31.2mw/ for temperatures above ta=25 , mounted on jesd51-7. operating conditions (ta=25 ) parameter symbol limits unit min. typ. max. v cc voltage v cc *4 4.5 5.0 5.5 v pv cc voltage p vcc *4 4.5 5.0 5.5 v en voltage v en 0 - vcc v sw average output current isw *4 - - 2.0 a *4 pd should not be exceeded. no.09027eat32
bd9111nv technical note 2/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. electrical characteristics bd9111nv (ta=25 , v cc =pv cc =3.3v, en=v cc .) parameter symbol min. typ. max. unit conditions standby current i stb - 0 10 a en=gnd bias current i cc - 250 450 a en low voltage v enl - gnd 0.8 v standby mode en high voltage v enh 2.0 v cc - v active mode en input current i en - 1 10 a v en =5v oscillation frequency f osc 0.8 1 1.2 mhz pch fet on resistance r onp - 200 320 m ? p vcc =5v nch fet on resistance r onn - 150 270 m ? p vcc =5v output voltage v out 3.250 3.300 3.350 v ith si nk current i thsi 10 20 - a v out =3.6v ith s ource c urrent i thso 10 20 - a v out =3.0v uvlo threshold voltage v uvlo1 3.6 3.8 4.0 v v cc =5 0v uvlo release voltage v uvlo2 3.65 3.90 4.2 v v cc =0 5v soft start time t ss 0.5 1 2 ms timer latch time t latch 1 2 3 ms scp/tsd operated output short circuit threshold voltage v scp - 1.65 2.31 v out v out =3.3 0v block diagram, application circuit fig.1 bd9111nv top view fig.2 bd9111nv block diagram pin number and function pin no. pin name pin function 1 vout output voltage pin 2 v cc vcc power supply input pin 3 ith gmamp output pin/connected phase compensation capacitor 4 gnd ground 5 pgnd nch fet source pin 6 sw pch/nch fet drain output pin 7 pv cc pch fet source pin 8 en enable pin(active high) vout1 v cc 2 ith 3 gnd 4 8 en 7 pv cc 6 sw 5 pgnd top view output 5v input pv cc pgnd sw gnd gm amp. 2.2h v cc r s q osc uvlo tsd 22f v cc v cc clk slope en current comp 2 2 f 8 7 2 6 5 4 soft start current sense/ protect + driver logic vref ith r ith c ith 3 scp vout 1
bd9111nv technical note 3/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. 0.0 1.0 2.0 3.0 4.0 5.0 01 23 45 output current:i out [a] output voltage:vout[v] 0.0 0.5 1.0 1.5 2.0 012345 en voltage:ven[v] output voltage:vout[v] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 012345 input voltage:v cc [v] output voltage:vout[v] vcc=5v ta = 2 5 vcc=5v ta = 2 5 io=2a ta = 2 5 characteristics data fig.3 vcc-vout fig.4 v en-vout fig.5 iout-vout fig. 6 ta-v out fig.7 efficiency fig.8 ta-f osc fig.9 ta-r onn , r onp fig.10 ta-v en fig.11 ta-i cc io=0a 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current:i out [ma] efficiency: [%] 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 -25 0 25 50 75 100 temperature:ta[ ] output voltage:vout[v] vcc=5v io=0a vcc=5v 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 -25 0 25 50 75 100 temperature:ta[ ] frequency:f osc [mhz] ta = 2 5 vcc=5v 0 50 100 150 200 250 300 350 400 -25 0 25 50 75 100 temperature:ta[ ] circuit current:i cc [ a] 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 -25 0 25 50 75 100 temperature:ta[ ] on resistance:r on [ ] pmos nmos vcc=5v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -25 0 25 50 75 100 temperature:ta[ ] en voltage:ven[v] vcc=5v vcc=5v
bd9111nv technical note 4/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. 0.8 0.9 1 1.1 1.2 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 input voltage:v cc [v] frequency:f osc [mhz] fig.12 vcc-fosc fig.13 soft start waveform fig.14 sw waveform io=10ma fig.15 sw waveform io=200mas fig. 16 transient response io=1a2a(10 s) fig.17 transient response io=2a1a(10 s) v out i out v out i out sllm control vcc=5v ta = 2 5 pwm control vcc=5v ta = 2 5 100mv vcc=5v t a =2 5 110mv sw v out ta = 2 5 vcc=5 v ta = 2 5 io=0 a 1msec vcc=5 v ta = 2 5 v cc =pv cc =en v out
bd9111nv technical note 5/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. information on advantages advantage 1 offers fast transient response with current mode control system. voltage drop due to sudden change in load was reduced by about 50%. fig.18 comparison of transient response advantage 2 offers high efficiency for all load range. ? for lighter load: utilizes the current mode contro l mode called sllm for lighter load, which r educes various dissipation such as switching dissipation (p sw ), gate charge/discharge dissipation, esr dissipation of output capacitor (p esr ) and on-resistance dissipation (p ron ) that may otherwise cause degradation in efficiency for lighter load. achieves efficiency improvement for lighter load. ? for heavier load: utilizes the synchronous rectifyi ng mode and the low on-resistance mos fets incorporated as power transistor. on resistance of p-channel mos fet : 200m ? (typ.) on resistance of n-channel mos fet : 160m ? (typ.) achieves efficiency improvement for heavier load. offers high efficiency for all load range with the improvements mentioned above. advantage 3 ? supplied in smaller package due to small-sized power mos fet incorporated. reduces a mounting area required. fig.20 example application fig.19 efficiency conventional product (load response i o =0.1a 0.6a) bd9111nv (load response i o =1a 2a) ? output capacitor co required for current mode control: 22 f ceramic capacitor ? inductance l required for the oper ating frequency of 1 mhz: 2.2 h inductor (bd9111nv:co=22 f, l=2.2 h) 0.001 0.01 0.1 1 0 50 100 pwm sllm inprovement by sllm system improvement by synchronous rectifier efficiency [%] output current io[a] v out i out v out i out 160mv 100mv r ith l co v out c ith v cc cin 10mm 15mm r ith c ith c in c o l dc/dc convertor controller
bd9111nv technical note 6/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. operation bd9111nv is a synchronous rectifying step-down switching regula tor that achieves faster transient response by employing current mode pwm control system. it utiliz es switching operation in pwm (pulse width modulation) mode for heavier load, while it utilizes sllm (simple light load mode) operation for lighter load to improve efficiency. synchronous rectifier it does not require the power to be dissipated by a rectifier externally connected to a conventional dc/dc converter ic, and its p.n junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. current mode pwm control synthesizes a pwm control signal with a inductor current feedback loop added to the voltage feedback. ? pwm (pulse width modulation) control the oscillation frequency for pwm is 1 mhz. set si gnal form osc turns on a p-channel mos fet (while a n-channel mos fet is turned off), and an inductor current i l increases. the current comparator (current comp) receives two signals, a current feedback contro l signal (sense: voltage converted from i l ) and a voltage feedback control signal (fb), and issues a reset signal if both input signals are identical to each other, and turns off the p-channel mos fet (while a n-channel mos fet is turned on ) for the rest of the fixe d period. the pwm control repeat this operation. ? sllm (simple light load mode) control when the control mode is shifted from pwm for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn off with the device held operated in norm al pwm control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. although the pwm control loop contin ues to operate with a set signal from osc and a reset signal from current comp, it is so designed that the reset si gnal is held issued if shifted to the light load mode, with which the switching is tuned off and the switching pulses are th inned out under control. activating the switching intermittently reduces the switching dissipation and improves the efficiency. fig.21 diagram of current mode pwm control fig.22 pwm switching timing chart fig.23 sllm tm switching timing chart curren t comp set reset sw v out pvcc gnd gnd gnd i l (ave) v out (ave) sense fb curren t comp set reset sw v out pvcc gnd gnd gnd 0a v out (ave) sense fb i l not switching i l osc level shift driver logic rq s i l sw ith current comp gm amp. set reset fb load sense v out v out
bd9111nv technical note 7/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. description of operations ? soft-start function en terminal shifted to ?high? activates a soft-starter to gradually establish the output voltage with the current limited durin g startup, by which it is possible to prevent an ov ershoot of output voltage and an inrush current. ? shutdown function with en terminal shifted to ?low?, the device turns to standby mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turn ed to off. circuit current during standby is 0 f (typ.). ? uvlo function detects whether the input voltage sufficient to secure the output voltage of this ic is supplied. and the hysteresis width of 100mv (typ.) is provided to prevent output chattering. fig.24 soft start, shutdown, uvlo timing chart ? short-current protection circuit with time delay function turns off the output to protect the ic fr om breakdown when the incorporated current limiter is activated continuously for the fixed time(t latch ) or more. the output thus held tuned off may be recovered by restarting en or by re-unlocking uvlo. fig.25 short-current protection circuit with time delay timing chart t2=t latch output off latch en v out output short circuit threshold voltage i l standby mode operating mode operating mode en timer latch en standby mode i l limi t t1 bd9111nv technical note 8/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. switching regulator efficiency efficiency ? may be expressed by the equation shown below: efficiency may be improved by reducing the swit ching regulator power dissipation factors p d as follows: dissipation factors: 1) on resistance dissipation of inductor and fet pd(i 2 r) 2) gate charge/discharge dissipation pd(gate) 3) switching dissipation pd(sw) 4) esr dissipation of capacitor pd(esr) 5) operating current dissipation of ic pd(ic) 1)pd(i 2 r)=i out 2 (r coil +r on ) (r coil [ ? ] dc resistance of inductor, r on [ ? ] on resistance of fet, i out [a] output current.) 2)pd(gate)=cgsfv (cgs[f] gate capacitance of fet,f[hz] switching frequency,v[v] gate driving voltage of fet) 4)pd(esr)=i rms 2 esr (i rms [a] ripple current of capacitor,esr[ ? ] equivalent series resistance.) 5)pd(ic)=vini cc (i cc [a] circuit current.) consideration on permissible dissipation and heat generation as this ic functions with high efficien cy without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. in case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible di ssipation and/or heat generation must be carefully considered. for dissipation, only conduction losses due to dc resistance of inductor and on resistance of fet are considered. because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. if v cc =5v, v out =3.3v, r onp =0.2 ? , r onn =0.16 ? i out =2a, for example, d=v out /v cc =3.3/5.0=0.66 r on =0.660.20+(1-0.66)0.16 =0.132+0.0544 =0.1864[ ? ] p=2 2 0.1864 0.7456w] as r onp is greater than r onn in this ic, the dissipation increases as the on duty becomes greater. with the consideration on the dissipation as above, thermal des ign must be carried out with sufficient margin allowed. 0 25 50 75 100 125 150 0 2.0 3.0 4.0 0.90w 3.9w 105 1.0 0.64w = v out i out viniin 100[%]= p out pin 100[%]= p out p out +p d 100[%] fig.26 thermal derating curve (son008v5060) p=i out 2 r on r on =dr onp +(1-d)r onn d on duty (=v out /v cc ) r coil dc resistance of coil r onp on resistance of p-channel mos fet r onn on resistance of n-channel mos fet i out output current power dissipation:pd [w] ambient temperature:ta [ ] for son008v5060 jedec 4 layer board 76.2114.31.6mm j-a=32.1 /w for son008v5060 rohm standard 1 layer board 70701.6mm j-a=138.9 /w ic only j-a=195.3 /w vin 2 c rss i out f i drive 3)pd(sw)= (c rss [f] reverse transfer capacitance of fet,i drive [a] peak current of gate.)
bd9111nv technical note 9/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. selection of components externally connected 1. selection of inductor (l) * current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficien cy. the inductor must be selected allowing sufficient margin wi th which the peak current may not exceed its current rating. if v cc =5v, v out =3.3v, f=1mhz, i l =0.32a=0.6a, for example,(bd9111nv) * select the inductor of low resistance component (such as dcr and acr) to minimize dissipation in the inductor for better effi ciency. 2. selection of output capacitor (c o ) 3. selection of input capacitor (cin) a low esr 22 f/10v ceramic capacitor is recommended to reduce esr di ssipation of input capacitor for better efficiency. the inductance significantly depe nds on output ripple current. a s seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. i l = (v cc -v out )v out lv cc f [a] ??? ( 1 ) a ppropriate ripple current at output should be 20% more or less of the maximum out p ut current. i l =0.3i out max. [a] ???(2) l= (v cc -v out )v out i l v cc f [h] ??? ( 3 ) ( i l : output ripple current, and f: switching frequency) output capacitor should be selected with the consideration on the stability region and the equivalent series resistance re quired to smooth ripple voltage. output ripple voltage is determined by the equation (4) v out = i l esr [v] ???(4) ( i l : output ripple current, esr: equivalent series resistance of output capacitor) *rating of the capacitor should be determined allowing sufficient margin against output voltage. less esr allows reduction in output ripple voltage. 22 f to 100 f ceramic capacitor is recommended. input capacitor to select must be a low esr capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. the ripple current irms is given by the equation (5): fig.28 output capacitor ( 5.0-3.3 ) 3.3 0.65.01m l= =1.87 2.2[ h] fig.29 input capacitor i l v cc il l co v out fig.27 output ripple current i l v cc l co v out esr v cc l co v out cin i rms =i out v out ( v cc -v out ) v cc [ a ] ??? ( 5 ) when vcc is twice the v out , i rms = i out 2 < worst case > i rms(max.) i rms =2 3.3 ( 5.0-3.3 ) 5.0 =0.947 [ a rms ] if v cc =5.0v, v out =3.3v, and i outmax.= 2a, (bd9111nv)
bd9111nv technical note 10/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. 4. determination of rith, cith that works as a phase compensator as the current mode control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a cr filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its esr. so, the phases are easily compensated by adding a zero to the power amplifier output with c and r as described bel ow to cancel a pole at the power amplifier. stable feedback loop may be achieved by canceling the pole fp (min.) produced by the output capacitor and the load resistance with cr zero correction by the error amplifier. fig.30 open loop gain characteristics fig.31 error amp phase compensation characteristics fp= 2 r o c o 1 fz (esr) = 2 e sr c o 1 pole at power amplifie r when the output current decreases, the load resistance ro increases and the pole frequency lowers. fp (min.) = 2 r omax. c o 1 [hz] with lighter load fp (max.) = 2 r omin. c o 1 [hz] with heavier load zero at power amplifie r fz (amp.) = 2 r ith c ith 1 gnd,pgnd sw v cc ,pv cc en v out ith v cc v out cin r ith c ith l esr c o r o v out fig.32 typical application fz (amp.) = fp (min.) 2 r ith c ith 1 = 2 r omax. c o 1 gain [db] phase [deg] a 0 0 -90 a 0 0 -90 fz(amp.) fp(min.) fp(max.) fz(esr) i out min. i out max. gain [db] phase [deg] increasing capacitance of the out put capacitor lowers the pole frequency while the zero frequency does not change. (this is because when the capacitance is doubled, the capacitor esr reduces to half.)
bd9111nv technical note 11/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. bd9111nv cautions on pc board layout fig.33 layout diagram for the sections drawn with heavy line, use th ick conductor pattern as short as possible. lay out the input ceramic capacitor cin closer to the pi ns pvcc and pgnd, and the output capacitor co closer to the pin pgnd. lay out cith and rith between the pi ns ith and gnd as near as possible with least necessary wiring. son008v5060 (bd9111nv) has thermal fi n on the reverse of the package. the package thermal performance may be enhanced by bonding the fin to gnd plane which take a large area of pcb. recommended components lists on above application symbol part value manufacturer series l coil 2.2uh tdk ltf5022-2r2n3r2 c in ceramic capacitor 22uf kyocera cm32x5r226m10a c o ceramic capacitor 22uf kyocera cm316b226m06a c ith ceramic capacitor 680pf murata r ith resistance 12k ? rohm mch03serise * the parts list presented above is an example of recommended part s. although the parts are sound, actual circuit characteristi cs should be checked on your application carefully before use. be sure to allow sufficient margins to accommodate variations between external devices and th is ic when employing the depicted circuit with other circuit constants modified. both stat ic and transient characteristics should be considered in estab lishing these margins. when switching noise is substantial and may impa ct the system, a low pass filter should be inserted between the vcc and pvcc pins, a nd a schottky barrier diode established between the sw and pgnd pins. i/o equivalence circuit fig.34 i/o equivalence circuit vout v cc ith gnd en pv cc sw pgnd v cc r ith gnd c o c in v out en l c ith 1 2 3 4 8 7 6 5 en ? en pin ? sw pin pv cc sw pv cc pv cc ith ? ith pin v cc v cc v out 10k ? vout pin
bd9111nv technical note 12/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. notes for use 1. absolute ma ximum ratings while utmost care is taken to quality control of this pr oduct, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operat ing temperature range may result in breakage. if broken, short-mode or open-mode may not be identif ied. so if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary sa fety measures physically including insertion of fuses. 2. electrical potential at gnd gnd must be designed to have the lowest elec trical potential in any operating conditions. 3. short-circuiting between terminals, and mismounting when mounting to pc board, care must be taken to avoid mist ake in its orientation and alignment. failure to do so may result in ic breakdown. short-circui ting due to foreign matters entered between output terminals, or between output and power supply or gnd may also cause breakdown. 4.operation in strong electromagnetic field be noted that using the ic in the strong electr omagnetic radiation can cause operation failures. 5. thermal shutdown protection circuit thermal shutdown protection circuit is the circuit designed to isolate the ic from thermal runaway, and not intended to protect and guarantee the ic. so, the ic t he thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. inspection with the ic set to a pc board if a capacitor must be connected to the pin of lower impeda nce during inspection with the ic set to a pc board, the capacitor must be discharged after each process to avoid stress to the ic. for electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. when connecting to jigs in the inspection process, be sure to turn off the power supply before it is connected and removed. 7. input to ic terminals this is a monolithic ic with p + isolation between p-substrate and each element as illustrated below. this p-layer and the n-layer of each element form a p- n junction, and various parasitic element are formed. if a resistor is joined to a transistor terminal as shown in fig 35. p-n junction works as a parasitic diode if the following rela tionship is satisfied; gnd>terminal a (at resistor side), or gnd>terminal b (at transistor side); and if gnd>terminal b (at npn transistor side), a parasitic npn transistor is activated by n-layer of ot her element adjacent to the above-mentioned parasitic diode. the structure of the ic inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown . it is therefore requested to take care not to use the device in such manner that the voltage lowe r than gnd (at p-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. fig.35 simplified structure of monorisic ic 8. ground wiring pattern if small-signal gnd and large-current gnd are provided, it will be recommended to separate the large-current gnd pattern from the small-signal gnd pattern and establish a si ngle ground at the reference poi nt of the set pcb so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal gnd. pay attention not to cause fluctuations in the gnd wiring pattern of external parts as well. 9 . selection of inductor it is recommended to use an inductor with a series resistance element (dcr) 0.1 ? or less. note that use of a high dcr inductor will cause an inductor loss, resulting in decreased output voltage. should this condition continue for a specified period (soft start time + timer latch time), output short ci rcuit protection will be activated and output will be latched off. when using an inductor over 0.1 ? , be careful to ensure adequate margins for variation between external devices and this ic, including transient as well as static characteristics. furthermore, in any case, it is recommended to start up the output with en after supply voltage is within operation range. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element
bd9111nv technical note 13/13 www.rohm.com 2009.05 - rev.a ? 2009 rohm co., ltd. all rights reserved. ordering part number b d 9 1 1 1 n v - e 2 part no. part no. 9111 package nv : son008v5060 packaging and forming specification e2: embossed tape and reel ( son008v5060 ) (unit : mm) son008v5060 0.08 s s 765 4321 8 (0.22) c0.25 1pin mark +0.03 - 0.02 0.02 0.59 0.4 +0.05 - 0.04 5.0 0.15 6.0 0.15 4.2 0.1 3.6 0.1 0.8 0.1 1.0max 1.27 ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin
r0039 a www.rohm.com ? 2009 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.


▲Up To Search▲   

 
Price & Availability of BD9111NV-09

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X